module writeback_wrapper(i_pipe, o_branch, o_gpr, o_cpsr, o_spsr, o_valid);
input [434:0] i_pipe;
output [30:0] o_branch;
output [80:0] o_gpr;
output [16:0] o_cpsr;
output [38:0] o_spsr;
output o_valid;
wire _i_pipe_valid;
wire [29:0] _i_pipe_pc;
wire [31:0] _i_pipe_instr;
wire [14:0] _i_pipe_gpr_we;
wire _i_pipe_gpr_we0;
wire [3:0] _i_pipe_gpr_wa0;
wire _i_pipe_gpr_wa0_exc;
wire [1:0] _i_pipe_gpr_dsel0_wb;
wire [31:0] _i_pipe_gpr_d0_prev;
wire [31:0] _i_pipe_gpr_d0_alu;
wire [31:0] _i_pipe_gpr_d0_mul;
wire [31:0] _i_pipe_gpr_d0_exta;
wire _i_pipe_gpr_we1;
wire [3:0] _i_pipe_gpr_wa1;
wire _i_pipe_gpr_wa1_usr;
wire _i_pipe_gpr_dsel1;
wire [31:0] _i_pipe_gpr_d1_ld;
wire [31:0] _i_pipe_gpr_d1_mul;
wire _i_pipe_cpsr_nzcv_we;
wire [1:0] _i_pipe_cpsr_nzcv_dsel;
wire [3:0] _i_pipe_cpsr_nzcv_d_rm;
wire [3:0] _i_pipe_cpsr_nzcv_d_spsr;
wire [3:0] _i_pipe_cpsr_nzcv_d_alu;
wire [3:0] _i_pipe_cpsr_nzcv_d_mul;
wire [2:0] _i_pipe_cpsr_aif_we;
wire [1:0] _i_pipe_cpsr_aif_dsel;
wire [2:0] _i_pipe_cpsr_aif_d_rm;
wire [2:0] _i_pipe_cpsr_aif_d_spsr;
wire [2:0] _i_pipe_cpsr_aif_d_imm;
wire _i_pipe_cpsr_mode_we;
wire [1:0] _i_pipe_cpsr_mode_dsel;
wire [4:0] _i_pipe_cpsr_mode_d_rm;
wire [4:0] _i_pipe_cpsr_mode_d_spsr;
wire [4:0] _i_pipe_cpsr_mode_d_imm;
wire _i_pipe_spsr_we;
wire _i_pipe_spsr_dsel;
wire [31:0] _i_pipe_spsr_d_rm;
wire [31:0] _i_pipe_spsr_d_cpsr;
wire _i_pipe_branch;
wire [1:0] _i_pipe_branch_dest_sel;
wire [29:0] _i_pipe_branch_dest_ex1;
wire _o_branch_branch;
wire [29:0] _o_branch_dest;
wire _o_gpr_we0;
wire [3:0] _o_gpr_wa0;
wire _o_gpr_wa0_exc;
wire [4:0] _o_gpr_wa0_exc_mode;
wire [31:0] _o_gpr_d0;
wire _o_gpr_we1;
wire [3:0] _o_gpr_wa1;
wire _o_gpr_wa1_usr;
wire [31:0] _o_gpr_d1;
wire _o_cpsr_nzcv_we;
wire [3:0] _o_cpsr_nzcv_d;
wire [2:0] _o_cpsr_aif_we;
wire [2:0] _o_cpsr_aif_d;
wire _o_cpsr_mode_we;
wire [4:0] _o_cpsr_mode_d;
wire _o_spsr_we;
wire _o_spsr_wa_exc;
wire [4:0] _o_spsr_wa_exc_mode;
wire [31:0] _o_spsr_d;
wire _o_valid;
assign {_i_pipe_valid, _i_pipe_pc, _i_pipe_instr, _i_pipe_gpr_we, _i_pipe_gpr_we0, _i_pipe_gpr_wa0, _i_pipe_gpr_wa0_exc, _i_pipe_gpr_dsel0_wb, _i_pipe_gpr_d0_prev, _i_pipe_gpr_d0_alu, _i_pipe_gpr_d0_mul, _i_pipe_gpr_d0_exta, _i_pipe_gpr_we1, _i_pipe_gpr_wa1, _i_pipe_gpr_wa1_usr, _i_pipe_gpr_dsel1, _i_pipe_gpr_d1_ld, _i_pipe_gpr_d1_mul, _i_pipe_cpsr_nzcv_we, _i_pipe_cpsr_nzcv_dsel, _i_pipe_cpsr_nzcv_d_rm, _i_pipe_cpsr_nzcv_d_spsr, _i_pipe_cpsr_nzcv_d_alu, _i_pipe_cpsr_nzcv_d_mul, _i_pipe_cpsr_aif_we, _i_pipe_cpsr_aif_dsel, _i_pipe_cpsr_aif_d_rm, _i_pipe_cpsr_aif_d_spsr, _i_pipe_cpsr_aif_d_imm, _i_pipe_cpsr_mode_we, _i_pipe_cpsr_mode_dsel, _i_pipe_cpsr_mode_d_rm, _i_pipe_cpsr_mode_d_spsr, _i_pipe_cpsr_mode_d_imm, _i_pipe_spsr_we, _i_pipe_spsr_dsel, _i_pipe_spsr_d_rm, _i_pipe_spsr_d_cpsr, _i_pipe_branch, _i_pipe_branch_dest_sel, _i_pipe_branch_dest_ex1} = i_pipe;
assign o_branch = {_o_branch_branch, _o_branch_dest};
assign o_gpr = {_o_gpr_we0, _o_gpr_wa0, _o_gpr_wa0_exc, _o_gpr_wa0_exc_mode, _o_gpr_d0, _o_gpr_we1, _o_gpr_wa1, _o_gpr_wa1_usr, _o_gpr_d1};
assign o_cpsr = {_o_cpsr_nzcv_we, _o_cpsr_nzcv_d, _o_cpsr_aif_we, _o_cpsr_aif_d, _o_cpsr_mode_we, _o_cpsr_mode_d};
assign o_spsr = {_o_spsr_we, _o_spsr_wa_exc, _o_spsr_wa_exc_mode, _o_spsr_d};
assign o_valid = {_o_valid};
writeback u_writeback(
  .i_pipe_valid(_i_pipe_valid),
  .i_pipe_pc(_i_pipe_pc),
  .i_pipe_instr(_i_pipe_instr),
  .i_pipe_gpr_we(_i_pipe_gpr_we),
  .i_pipe_gpr_we0(_i_pipe_gpr_we0),
  .i_pipe_gpr_wa0(_i_pipe_gpr_wa0),
  .i_pipe_gpr_wa0_exc(_i_pipe_gpr_wa0_exc),
  .i_pipe_gpr_dsel0_wb(_i_pipe_gpr_dsel0_wb),
  .i_pipe_gpr_d0_prev(_i_pipe_gpr_d0_prev),
  .i_pipe_gpr_d0_alu(_i_pipe_gpr_d0_alu),
  .i_pipe_gpr_d0_mul(_i_pipe_gpr_d0_mul),
  .i_pipe_gpr_d0_exta(_i_pipe_gpr_d0_exta),
  .i_pipe_gpr_we1(_i_pipe_gpr_we1),
  .i_pipe_gpr_wa1(_i_pipe_gpr_wa1),
  .i_pipe_gpr_wa1_usr(_i_pipe_gpr_wa1_usr),
  .i_pipe_gpr_dsel1(_i_pipe_gpr_dsel1),
  .i_pipe_gpr_d1_ld(_i_pipe_gpr_d1_ld),
  .i_pipe_gpr_d1_mul(_i_pipe_gpr_d1_mul),
  .i_pipe_cpsr_nzcv_we(_i_pipe_cpsr_nzcv_we),
  .i_pipe_cpsr_nzcv_dsel(_i_pipe_cpsr_nzcv_dsel),
  .i_pipe_cpsr_nzcv_d_rm(_i_pipe_cpsr_nzcv_d_rm),
  .i_pipe_cpsr_nzcv_d_spsr(_i_pipe_cpsr_nzcv_d_spsr),
  .i_pipe_cpsr_nzcv_d_alu(_i_pipe_cpsr_nzcv_d_alu),
  .i_pipe_cpsr_nzcv_d_mul(_i_pipe_cpsr_nzcv_d_mul),
  .i_pipe_cpsr_aif_we(_i_pipe_cpsr_aif_we),
  .i_pipe_cpsr_aif_dsel(_i_pipe_cpsr_aif_dsel),
  .i_pipe_cpsr_aif_d_rm(_i_pipe_cpsr_aif_d_rm),
  .i_pipe_cpsr_aif_d_spsr(_i_pipe_cpsr_aif_d_spsr),
  .i_pipe_cpsr_aif_d_imm(_i_pipe_cpsr_aif_d_imm),
  .i_pipe_cpsr_mode_we(_i_pipe_cpsr_mode_we),
  .i_pipe_cpsr_mode_dsel(_i_pipe_cpsr_mode_dsel),
  .i_pipe_cpsr_mode_d_rm(_i_pipe_cpsr_mode_d_rm),
  .i_pipe_cpsr_mode_d_spsr(_i_pipe_cpsr_mode_d_spsr),
  .i_pipe_cpsr_mode_d_imm(_i_pipe_cpsr_mode_d_imm),
  .i_pipe_spsr_we(_i_pipe_spsr_we),
  .i_pipe_spsr_dsel(_i_pipe_spsr_dsel),
  .i_pipe_spsr_d_rm(_i_pipe_spsr_d_rm),
  .i_pipe_spsr_d_cpsr(_i_pipe_spsr_d_cpsr),
  .i_pipe_branch(_i_pipe_branch),
  .i_pipe_branch_dest_sel(_i_pipe_branch_dest_sel),
  .i_pipe_branch_dest_ex1(_i_pipe_branch_dest_ex1),
  .o_branch_branch(_o_branch_branch),
  .o_branch_dest(_o_branch_dest),
  .o_gpr_we0(_o_gpr_we0),
  .o_gpr_wa0(_o_gpr_wa0),
  .o_gpr_wa0_exc(_o_gpr_wa0_exc),
  .o_gpr_wa0_exc_mode(_o_gpr_wa0_exc_mode),
  .o_gpr_d0(_o_gpr_d0),
  .o_gpr_we1(_o_gpr_we1),
  .o_gpr_wa1(_o_gpr_wa1),
  .o_gpr_wa1_usr(_o_gpr_wa1_usr),
  .o_gpr_d1(_o_gpr_d1),
  .o_cpsr_nzcv_we(_o_cpsr_nzcv_we),
  .o_cpsr_nzcv_d(_o_cpsr_nzcv_d),
  .o_cpsr_aif_we(_o_cpsr_aif_we),
  .o_cpsr_aif_d(_o_cpsr_aif_d),
  .o_cpsr_mode_we(_o_cpsr_mode_we),
  .o_cpsr_mode_d(_o_cpsr_mode_d),
  .o_spsr_we(_o_spsr_we),
  .o_spsr_wa_exc(_o_spsr_wa_exc),
  .o_spsr_wa_exc_mode(_o_spsr_wa_exc_mode),
  .o_spsr_d(_o_spsr_d),
  .o_valid(_o_valid)
);
endmodule
